Preliminary Schedule

Parnian Mokri and Mark Hempstead
Detecting Coarse Grained Reconfigurable kernels using ReconfAST
Michel Kinsy, Mihailo Isakov, Alan Ehret and Donato Kava
Self-Aware Polymorphic Adaptive (SAPA) Architectures
Ayse Coskun, Furkan Eris, Ajay Joshi, Andrew B. Kahng, Yenai Ma, Saiful Mojumder and Tiansheng Zhang
Reclaiming Dark Silicon Using Thermally-Aware Chiplet Organization in 2.5D Integrated Systems
Jiwon Choe, Jonathan Lister, R. Iris Bahar, Maurice Herlihy and Tali Moreshet
Managing Concurrent Data Structures with Processing-In-Memory
Coffee break
Brandon Reagen, Udit Gupta, Robert Adolf, Michael Mitzenmacher, Alexander Rush, Gu-Yeon Wei and David Brooks
Compressing Deep Neural Networks with Probabilistic Data Structures
Aditya Narayan, Tiansheng Zhang, Shaizeen Aga, Satish Narayanasamy and Ayse Coskun
An Automated Framework for Memory Allocation in Heterogeneous Memory Systems
Michel Kinsy, Miguel Mark, Alan Ehret and Donato Kava
Sphinx: A Secure Architecture Based on Binary Code Diversification and Execution Obfuscation
Joel Emer, Srini Devadas, Adam Belay, and James Mickens
Invited Panel
Aaron Welch
An overview on the impact of Spectre and Meltdown on ARM
Shankar Viswanathan
Side Channel attacks on modern hardware
Rohan Garg and Gene Cooperman
Proxies for checkpointing in DMTCP: Staying close to the Hardware, but not too Close (Examples given from GPUs, RDMA networks, and other HPC components)
John Leidel
xBGAS: A RISC-V Extension for Datacenter-Scale Addressing
Coffee break
Kaustubh Shivdikar, Kaushal Paneri and David Kaeli
Speeding up DNNs using HPL based Fine-grained Tiling for Distributed Multi-GPU Training
Mihailo Isakov and Michel Kinsy
Hardware Efficient Sparse Neural Network Training
Babatunde Egbantan, Fritz Previlon and David Kaeli
Comparing HPC Applications Kernels Vulnerability Using LLFI-GPU
Rishiyur Nikhil
The Bluespec RISC-V Verification Factory
Zheming Jin, Kazutomo Yoshii and Hal Finkel
Understanding How OpenCL Parameters Impact the Performance of Streaming Kernels on FPGA


Registration is not required this year.

Registration includes breakfast, light lunch, and coffee during all breaks.

Call for Abstracts


The goal of BARC is to provide a forum for computer architects in the Greater Boston area and beyond to get together and present/discuss the 'latest and greatest' in the area of computer architecture. Papers are being sought on many aspects of computer architecture, including (but not limited to):

  • Microarchitecture
  • Multicore/manycore processors
  • GPUs
  • Memory systems
  • I/O
  • Networking and communication
  • Low power
  • Adaptive and hybrid systems
  • Architectures based on emerging technologies
  • Accelerator-based architectures
  • Embedded processing
  • Performance evaluation techniques
  • Important Dates:

    Deadline Extended January 5, 2018
    Abstract Submission Deadline: January 12, 2018
    Author Notification: January 15, 2018
    Workshop Date: Friday, January 26, 2018


    We invite abstracts, two pages or shorter, for consideration for presentation at BARC 2018. We will also have a session of lightning talks - you should denote a lightning round talk in your title as "Lightning Round". Authors may present work they have already published elsewhere, or plan to publish in the future. We welcome participation from those outside of the Greater Boston area.

    Please submit your abstract (in PDF format) using EasyChair:

    Abstracts will be accepted for a regular podium presentation or for a poster presentation. All accepted abstracts will be published in the workshop proceedings.
    Call for Abstracts in [PDF]

    For questions, contact Kurt Keville or Arun Thomas.

    The final manuscripts of all accepted abstracts will be posted on the BARC 2016 website. Please use the following guidelines for preparing the final manuscript: The technical program of BARC 2018 includes both oral presentations and poster presentations. Each oral presentation will be 20 minutes long (including Q&A). Poster authors should print their posters and bring to the workshop. The size of the posters can be up to 8'x4'.


    BARC 2018 will be held on the ground floor of the Stata Center, Gates Building at MIT.